Hi,
I've been designing a castellated system on module style RP2350A board - much like the ESP32 boards you see from Espressif, that I've not really seen an equivalent of for the RP2 series MCUs. The closest would be the RP2350 stamp, and size-wise, closer to the Seeed Xiao, but with more pins available, and everything on the board edge.
This board is smaller and deliberately has less features, i.e. runs specifically off 3.3V, no on board LDO, no LiPo charging, no onboard buttons. No USB. But, it exposes all the relevant pins from the RP2350A, all the IO pins.
Basically, you provide 3.3V and GND, plus anything else you need, run the USB traces to the edge of your board, put in a bootsel or reboot button as required.
But it's 18x15mm. And it's designed with a number of my own projects in mind where I need a minimal footprint, but without having to deal with 0402 components! The idea is that these will be assembled by the fab house, (on a panel with appropriate fiducials).
This is a 4 layer stackup, L1 Signal/L2 GND/ L3 Power + GND/L4 Signal + GND. And I'm not exactly sure about that part. The relevant bits of GND plane are reasonably well stitched by virtue of the components, and I wanted there to be an element of reference plane for the signals on L4. I deliberately removed the plane from L1, as it was causing issues with the grounds I'd put into L2 with vias. I'm not sure about its presence on L4.
Due to the, particulars, required by the RP2350 around the internal SMPS and the inductor layout, I've laid this out to match the design guide examples as much as possible.
It's a small board, and to fit everything in, the power traces are 8mil and signal traces 6mil.
So largely, I'm looking for any feedback you might care to give functionally on the schematic, although I'm fairly happy with this matching the reference example. The layout, particularly about the ground planes, but also any concerns about component placement, routing etc. I've also attached a pinout diagram.
Thanks for having a look!